MediaTek Filogic 860 : Specs, Features, and Key Technologies

MediaTek Filogic 860 is a mainstream dual-band Wi-Fi 7 (802.11be) system-on-chip platform designed primarily for access points, routers, repeaters, gateways, mesh nodes, and related networking equipment.

It delivers up to BE7200 (7.2 Gbps theoretical PHY rate) performance as a more cost- and power-efficient alternative to MediaTek’s higher-end Filogic 880 flagship, targeting broader retail, enterprise, service-provider, and IoT networking deployments rather than only ultra-premium multi-gigabit systems.

Positioning in the Filogic Family

MediaTek’s Filogic series covers Wi-Fi 6/6E and Wi-Fi 7 solutions for both infrastructure (routers/APs) and client devices. The 800-series targets access points and routers; the 300-series targets endpoints such as phones, PCs, and streaming devices.

Filogic 880 (flagship): Tri-band capable (with scalability), up to BE36000 / ~36 Gbps, 320 MHz channels, quad-core CPU, dual 10 GbE options.
Filogic 860 (mainstream): Dual-band focused with 5/6 GHz support, BE7200 / 7.2 Gbps, 160 MHz channels, triple-core CPU, single 10 GbE-class interface. It inherits key innovations such as single-MAC Multi-Link Operation (MLO) and Xtra Range technology from the 880 while reducing complexity and cost.
Companion chips like Filogic 660 handle related radio functions in some configurations.

Announced in November 2023, the platform began sampling shortly after, with mass production targeted for mid-2024. It uses an efficient 6 nm process.

Core Technical Specifications

Feature	Details
Wi-Fi Standard	Dual-band, dual-concurrent Wi-Fi 7 (802.11a/b/g/n/ac/ax/be)
Max PHY Rate	BE7200 (7.2 Gbps)
Frequency Bands	2.4 GHz, 5 GHz, 6 GHz
Channel Bandwidth	Up to BW40 (2.4 GHz), BW160 (5/6 GHz)
Antenna Configuration	4×4 (2.4 GHz) + 5×5 (5/6 GHz), including dedicated Rx for zero-wait DFS
Key Wi-Fi 7 Features	4096-QAM, MLO (single-MAC), MRU (Multi-RU), AFC (Automated Frequency Coordination), OFDMA, MU-MIMO
CPU	Triple-core Arm Cortex-A73 @ up to 1.8 GHz (over 20K DMIPS); some official tables list “Quad,” but primary descriptions and chip references (MT7988D) consistently indicate triple-core
NPU	Dedicated Network Processing Unit for QoS acceleration and tunneling offload (VLAN, PPTP, L2TP, GRE)
Ethernet	USXGMII (10 Gbps-class), 1× 2.5 GbE PHY + 4× 1 GbE ports
Other Interfaces	PCIe 3.0, USB 3.0/3.2 Gen1, UART, SD, SPI, PWM, GPIO, OTP
Memory / Storage	DDR3/DDR4; SPI-NOR, SPI-NAND, eMMC, SD
Security / Crypto	Hardware networking crypto engine (EIP-197) for IPv4 NAPT, IPv6, DS-Lite, 6RD acceleration
Process	6 nm

Note: Official product pages emphasize the unique 5×5 (or 4T5R) antenna design on the higher band and single-chip MLO architecture.

Key Architectural and Performance Highlights

Single-MAC MLO — Multi-Link Operation lets devices use multiple bands simultaneously for higher throughput, lower latency, and better reliability. MediaTek’s single-MAC implementation (versus multi-chip approaches) claims significantly lower latency (up to 100× better in some comparisons) and more efficient band switching/power use because aggregation happens on one chip.

Xtra Range / Antenna Design — The 5×5 (or 4T5R) configuration on 5/6 GHz supports improved receive diversity and Maximum Ratio Combining (MRC). MediaTek claims roughly +3 dB range/throughput gains in typical indoor scenarios from the extra antenna path, plus further RF improvements (iDPD). A dedicated receive path enables zero-wait Dynamic Frequency Selection (DFS), so the device can monitor radar channels without interrupting service. This helps mesh backhaul and coverage on higher-frequency bands that normally propagate less well.

Processing and Offload — The triple-core Cortex-A73 plus dedicated NPU handles networking tasks in hardware. This frees the main CPU for OS customization, value-added services, or applications that vendors may add. The NPU accelerates QoS and tunneling so wired-wireless traffic maintains high performance.

Wired Connectivity — A single high-speed USXGMII interface supports 10 Gbps Ethernet (useful for multi-gig fiber or enterprise uplinks), complemented by a 2.5 GbE port and four 1 GbE ports for flexible LAN designs.

Power and Efficiency — Built on 6 nm, it is positioned as lower-power than the flagship while still delivering full Wi-Fi 7 feature support (including 4096-QAM for denser modulation and higher rates under good conditions).

Target Use Cases and Market Role

Retail and consumer Wi-Fi 7 routers and mesh systems that do not require extreme tri-band 320 MHz performance.
Enterprise access points and service-provider gateways/CPE.
IoT-focused or edge networking devices.
Scenarios prioritizing reliable multi-gigabit dual-band performance, good range, low latency via MLO, and cost-effective multi-gig Ethernet.

Compared with pure Wi-Fi 6E solutions, it adds true Wi-Fi 7 capabilities (MLO, higher QAM, MRU, etc.) while remaining practical for volume mainstream products. Real-world throughput is lower than the theoretical 7.2 Gbps PHY rate and depends on client capabilities, channel conditions, interference, and configuration (typical multi-user or mixed environments yield substantially less).

Context and Limitations

The Filogic 860 sits in the “mainstream” tier: it brings Wi-Fi 7 features and strong dual-band MLO performance without the full tri-band 320 MHz / multi-10GbE complexity and cost of the 880. Independent documentation (e.g., chip databases referencing MT7988D) aligns with the dual-band BE7200 focus and triple-core CPU. As with any silicon platform, end-product performance also depends on RF front-end design, antenna implementation, firmware, thermal management, and software features added by the device maker.

In short, the MediaTek Filogic 860 is a practical, feature-rich Wi-Fi 7 platform that makes advanced connectivity (especially efficient MLO and extended 5/6 GHz reach) more accessible for a wide range of routers, APs, and gateways beyond the absolute high end.

Wi-Fi capabilities

This chipset delivers comprehensive IEEE 802.11be (Wi-Fi 7) features with strong dual-band concurrent operation, emphasizing reliable high throughput, low latency via Multi-Link Operation (MLO), extended range on higher bands, and efficient multi-user support. It targets practical mainstream deployments rather than extreme flagship multi-band configurations.

Overall Wi-Fi Performance Profile

The Filogic 860 is a dual-band, dual-concurrent Wi-Fi 7 solution supporting the full 802.11a/b/g/n/ac/ax/be stack. Its maximum theoretical PHY rate is BE7200, or 7.2 Gbps, described by MediaTek as an industry-leading dual-band MLO speed for its class.

It operates across 2.4 GHz, 5 GHz, and 6 GHz bands (with the higher-band radio handling 5/6 GHz). Real-world aggregate throughput is substantially lower than the PHY rate and depends on client capabilities, channel conditions, distance, interference, and concurrent users.

Key high-level attributes include:

Single-MAC MLO architecture for efficient multi-band aggregation and band switching.
Support for 160 MHz channels on 5/6 GHz and 40 MHz on 2.4 GHz.
4096-QAM modulation for denser data encoding under favorable signal conditions.
Advanced multi-user technologies (OFDMA and MU-MIMO).
MediaTek-specific enhancements for range and DFS handling.

Antenna Configuration and Spatial Streams

The platform uses a distinctive dual-band antenna design:

2.4 GHz: 4×4 (4T4R) configuration, supporting up to BW40.
5/6 GHz: Novel 5×5 (or 5T5R / 4T5R) array with 4 spatial streams (4SS), supporting up to BW160. This includes a dedicated receive antenna for zero-wait Dynamic Frequency Selection (DFS).

The extra receive path on the higher band enables MediaTek’s Xtra Range technology. It improves receive diversity and Maximum Ratio Combining (MRC), delivering claimed gains of approximately +3 dB in typical indoor throughput/range, plus further improvement from enhanced digital pre-distortion (iDPD) RF techniques. This helps overcome the inherent propagation limitations of 5 GHz and especially 6 GHz signals, benefiting mesh backhaul and coverage.

Core Wi-Fi 7 Features Supported

Multi-Link Operation (MLO): Single-chip MAC implementation aggregates links across bands for higher effective throughput, lower latency, and greater reliability. MediaTek claims latency reductions of up to 100× versus some competing multi-chip MLO approaches, along with smoother and more power-efficient band switching.
4096-QAM (4K-QAM): Higher-order modulation that increases data density compared with Wi-Fi 6/6E’s 1024-QAM, provided signal quality is strong.
Multi-Resource Unit (MRU): Allows more flexible allocation of spectrum resources to multiple users.
Automated Frequency Coordination (AFC): Enables standard-power operation in the 6 GHz band where regulatory frameworks support it.
OFDMA: Resource Unit (RU) support listed as 8+16, enabling efficient multi-user uplink and downlink scheduling.
MU-MIMO: 4+4 configuration for simultaneous multi-user spatial streams.
Other MAC capabilities: Flexible shared 512 hardware MAC entries; MBSSID support (16+16) for multiple virtual access points.
Zero-wait DFS: Dedicated receive antenna allows continuous radar monitoring without interrupting data service on DFS channels.

These features are implemented on an efficient 6 nm process with dedicated DSP support for transmit digital pre-distortion (improving EVM by a claimed +5 dB).

Band-Specific Capabilities Summary

Band	Antenna / Streams	Max Channel Bandwidth	Key Notes
2.4 GHz	4×4 (4T4R)	BW40	Solid legacy and IoT device support; contributes to aggregate MLO rate
5 GHz / 6 GHz	5×5 (5T5R / 4SS) with dedicated Rx	BW160	Primary high-speed band; Xtra Range and zero-wait DFS advantages; supports AFC on 6 GHz

The dual-concurrent design allows simultaneous operation on 2.4 GHz and 5/6 GHz. MLO can intelligently combine them for clients that support multi-link.

Practical Implications and Strengths

In dense or mixed-client environments, the combination of OFDMA, MU-MIMO, MRU, and single-MAC MLO aims to maintain low latency and efficient spectrum use. The Xtra Range and extra receive antenna particularly strengthen 5/6 GHz performance for indoor coverage and mesh systems, where higher frequencies typically struggle.

Compared with the higher-end Filogic 880 (which supports wider 320 MHz channels and higher aggregate rates in tri-band or more configurations), the 860 prioritizes cost-effective dual-band performance with strong 160 MHz and MLO capabilities that suit the majority of mainstream and enterprise access-point scenarios.

Limitations inherent to the design include the absence of 320 MHz channel support (reserved for flagship platforms) and reliance on the 5/6 GHz radio for the bulk of high-speed traffic. As with any Wi-Fi platform, end-device results also depend on the manufacturer’s RF design, antenna layout, firmware optimization, thermal management, and regulatory certifications.

Overall, the Filogic 860’s Wi-Fi capabilities center on delivering reliable, low-latency Wi-Fi 7 dual-band connectivity with enhanced range on the higher bands and efficient multi-user handling—making it a strong mainstream foundation for modern routers, APs, and gateways.

CPU capabilities

This platform integrates a capable application processor subsystem optimized for networking appliances rather than general-purpose computing. It pairs a multi-core Arm CPU with a dedicated Network Processing Unit (NPU) so that high-throughput Wi-Fi and Ethernet traffic can be handled efficiently while still leaving headroom for the operating system, management services, and vendor customizations.

Processor Core Details

The Filogic 860 uses a triple-core Arm Cortex-A73 cluster running at up to 1.8 GHz. It is a 64-bit architecture. MediaTek rates the combination at a class-leading performance of over 20K DMIPS, supported by a large internal cache.

Note on core count: Official product descriptions consistently state “triple-core,” and independent documentation of the MT7988D identifies three Cortex-A73 cores. Some MediaTek specification tables list “Quad (4),” which appears to be a carry-over from the closely related flagship MT7988A (Filogic 880) that uses four cores. Device-tree sources used in OpenWrt and similar projects typically disable or omit the fourth core on MT7988D variants, confirming the three-core configuration for the 860. A few secondary reports have incorrectly listed Cortex-A78 cores; primary references specify Cortex-A73.

The Cortex-A73 is a high-efficiency mid-to-high-performance core from Arm’s earlier generations. In this context it provides solid single- and multi-threaded performance for router/AP workloads (routing, firewall rules, VPN, QoS, web UI, and additional services) without the higher power or cost of newer flagship cores.

Network Processing Unit (NPU) and Offload

A key differentiator is the dedicated MediaTek-designed Network Processing Unit (NPU). It accelerates:

Hardware Quality of Service (QoS)
Tunneling offload for protocols such as VLAN, PPTP, L2TP, and GRE

The NPU operates on both Wi-Fi and Ethernet traffic, helping maintain full-speed performance when data moves between wireless and wired interfaces. By offloading these networking tasks, the main Cortex-A73 cores remain available for the operating system, device-maker customizations, built-in services, and applications.

An additional hardware networking crypto engine (EIP-197) further accelerates IPv4 NAPT, IPv6, DS-Lite, and 6RD operations.

Memory and Related Support

DRAM interface: DDR3 and DDR4 support.
The platform is designed to work with typical memory configurations used in routers and gateways, providing sufficient bandwidth for multi-gigabit packet processing alongside the NPU.

Practical Capabilities and Positioning

In a typical CPE (customer-premises equipment), router, or access-point design, the combination of the triple-core Cortex-A73 + NPU delivers:

Enough compute for modern Linux-based or proprietary firmware stacks.
Headroom for advanced features such as multi-WAN, VPN termination, parental controls, mesh management, traffic analytics, or light containerized services.
Efficient handling of the platform’s 7.2 Gbps-class Wi-Fi 7 traffic without saturating the CPU, thanks to the NPU and hardware accelerators.

Compared with the higher-end Filogic 880 (quad-core Cortex-A73 at the same 1.8 GHz clock, higher DMIPS rating), the 860’s three-core design is a deliberate cost- and power-optimized choice that still meets the needs of mainstream dual-band Wi-Fi 7 products. It is more capable than many older dual-core or lower-clock networking SoCs while remaining practical for volume production.

Limitations and Context

The Cortex-A73 cores are not the absolute latest Arm architecture, so absolute single-thread performance trails newer cores used in some competing high-end platforms. However, for the target workload—packet processing, control-plane tasks, and moderate application services—the combination of clock speed, core count, large cache, and especially the dedicated NPU makes the subsystem well-matched to the Filogic 860’s dual-band Wi-Fi 7 role.

In summary, the Filogic 860’s CPU subsystem centers on a triple-core 1.8 GHz Arm Cortex-A73 delivering over 20K DMIPS, heavily augmented by a networking-focused NPU and hardware crypto acceleration. This design prioritizes efficient multi-gigabit networking performance and vendor flexibility over raw general-purpose compute power.

Ethernet capabilities

This mainstream Wi-Fi 7 SoC includes a flexible multi-gigabit Ethernet subsystem designed to complement its dual-band wireless performance, support modern fiber or multi-gig uplinks, and provide practical LAN connectivity for routers, gateways, access points, and mesh nodes.

Ethernet Interface Overview

Official specifications list the Ethernet capabilities as:

USXGMII interface
One integrated 2.5 GbE PHY
Four 1 GbE ports

MediaTek describes the high-speed option as follows: “One USXGMII port provides 10Gbps Ethernet, ensuring full speed from wireless to wired is available, making the most of the latest 10G+ Fiber connections. In addition, a 2.5Gbps Ethernet port and four Gigabit Ethernet ports are available from the platform.”

USXGMII (Universal Serial 10 Gigabit Media Independent Interface) is a flexible SerDes-based interface that can operate at multiple rates (commonly supporting 10 Gbps, with the ability to negotiate lower speeds such as 5 Gbps, 2.5 Gbps, 1 Gbps, etc., depending on the connected PHY or optical module). In Filogic 860 designs it is typically used for a high-speed WAN or uplink port.

Practical Port Configurations

Device makers can implement a variety of wired setups using these interfaces, for example:

One 10 Gbps uplink (via USXGMII + external 10G PHY, SFP+, or similar) for multi-gig fiber or enterprise connections.
One dedicated 2.5 Gbps port (using the integrated 2.5 GbE PHY) for multi-gig LAN or secondary WAN use.
Four standard Gigabit Ethernet ports for typical LAN devices, switches, or additional clients.

This combination allows products to offer mixed multi-gig and Gigabit connectivity without requiring an external switch chip for basic configurations. Some implementations also leverage the platform’s integrated switch fabric and DSA (Distributed Switch Architecture) support seen in open-source firmware such as OpenWrt.

Performance and Integration Notes

The dedicated Network Processing Unit (NPU) works with both Wi-Fi and Ethernet traffic. It provides hardware acceleration for QoS and tunneling (VLAN, PPTP, L2TP, GRE), helping maintain high throughput when data moves between wireless clients and wired ports. A hardware networking crypto engine further assists with related acceleration tasks (IPv4 NAPT, IPv6, DS-Lite, 6RD).

Compared with the higher-end Filogic 880 (which supports dual USXGMII / dual 10 GbE options in some configurations), the 860 uses a single high-speed USXGMII path. This is a deliberate mainstream optimization that still delivers multi-gigabit wired performance well matched to the platform’s BE7200-class Wi-Fi 7 capabilities.

Design Flexibility and Use Cases

The Ethernet subsystem gives OEMs flexibility for:

Service-provider gateways and CPEs with 2.5G or 10G WAN.
Retail routers offering multi-gig LAN ports alongside Gigabit ports.
Enterprise or mesh access points that need a fast wired backhaul or uplink.
IoT or edge devices requiring a balance of high-speed and standard Ethernet connectivity.

In summary, the Filogic 860 provides practical multi-gigabit Ethernet via a 10 Gbps-capable USXGMII interface, an integrated 2.5 GbE PHY, and four 1 GbE ports. This setup ensures the wired side can keep pace with modern fiber and multi-gig demands while remaining cost-effective for volume mainstream Wi-Fi 7 networking products.

Other interfaces and peripheral capabilities

The platform is designed as a highly extensible system-on-chip for routers, access points, gateways, and related networking devices. In addition to its wireless and multi-gigabit Ethernet connectivity, it provides a set of high-speed and general-purpose interfaces that give device makers flexibility for storage, expansion, debugging, control signals, and customization.

High-Speed Expansion Interfaces

PCI Express 3.0 — Supports high-bandwidth expansion. Official descriptions note 10 Gbps-class PCIe capability, enabling connection of additional components such as external storage controllers, secondary network interfaces, or other peripherals. This is useful for designs that need more ports or specialized hardware beyond the integrated Ethernet and Wi-Fi.
USB 3.0 / USB 3.2 Gen 1 — Provides up to 5 Gbps per port. Some implementations and third-party breakdowns reference dual USB 3.2 ports. These are commonly used for external storage (USB hard drives or SSDs for media sharing or NAS-like functions), printer support, 3G/4G/5G modem dongles, or debugging/troubleshooting during development and deployment.

Storage Interfaces

The Filogic 860 supports multiple non-volatile storage options for firmware, configuration data, and optional application storage:

SPI-NOR flash
SPI-NAND flash
eMMC
SD card interface

These allow manufacturers to choose cost-effective or higher-capacity storage solutions depending on the product tier (basic consumer router versus feature-rich gateway).

General-Purpose and Control Interfaces

A range of lower-speed but essential interfaces supports system control, sensors, indicators, and customization:

UART — Serial console for debugging, bootloader access, and system management.
SPI — Serial Peripheral Interface for connecting sensors, additional flash, or other low-to-medium speed devices.
PWM — Pulse-width modulation outputs, typically used for fan control, LED dimming, or similar signaling.
GPIO — General-purpose input/output pins for buttons (reset, WPS), status LEDs, or custom hardware control.
OTP — One-time programmable memory for secure key storage, unique device identifiers, or factory configuration data.

MediaTek explicitly highlights these interfaces (along with the high-speed ones) as enabling “rich platform customization opportunities.”

Design Implications and Flexibility

Together, these interfaces make the Filogic 860 suitable for a wide range of product designs:

Basic retail routers can use the built-in flash options, USB for optional storage, and GPIO/PWM for front-panel indicators and buttons.
More advanced gateways or enterprise access points can leverage PCIe for expansion cards, dual USB ports for peripherals, and the full set of control interfaces for sophisticated hardware management.
The combination supports OpenWrt and other open-source or proprietary firmware environments, which commonly expose these interfaces for developers.

Compared with higher-end platforms such as the Filogic 880, the 860 retains a practical and sufficient set of expansion options while focusing on cost-effective mainstream deployment. The exact number of available pins or simultaneous ports depends on the final board design and package pinout, but the listed interfaces provide a solid foundation for most networking equipment requirements.

In summary, the Filogic 860 complements its Wi-Fi 7 and multi-gigabit Ethernet capabilities with PCIe 3.0, USB 3.x (up to 5 Gbps), multiple storage options (SPI-NOR/NAND, eMMC, SD), and a full suite of control interfaces (UART, SPI, PWM, GPIO, OTP). This extensibility allows manufacturers to tailor products for consumer, service-provider, enterprise, and IoT networking use cases.

Memory / Storage capabilities

This mainstream Wi-Fi 7 SoC provides flexible DRAM and non-volatile storage options suited to routers, access points, gateways, and related networking equipment. The design balances cost-effectiveness with sufficient capacity and bandwidth for multi-gigabit packet processing, firmware, configuration data, and optional value-added services.

DRAM (System Memory)

The Filogic 860 supports DDR3 and DDR4 memory interfaces.

These external DRAM options supply the working memory for the triple-core Arm Cortex-A73 CPU, Network Processing Unit (NPU), and overall system operations. DDR4 offers higher bandwidth and better efficiency than DDR3, while DDR3 support provides design flexibility for cost-sensitive products or existing supply chains.

Exact maximum capacity, bus width, and supported clock speeds (for example, specific MT/s rates) are determined by the final board design and are not publicly detailed in MediaTek’s high-level product specifications for the 860. In practice, networking SoCs in this class typically pair with several hundred megabytes to a few gigabytes of DRAM, depending on the target product feature set (basic consumer router versus a more feature-rich gateway with VPN, analytics, or containers).

The large internal cache on the Cortex-A73 cores further helps reduce external memory pressure for common networking workloads.

Non-Volatile Storage Interfaces

The platform includes multiple options for firmware, bootloaders, configuration data, logs, and optional application storage:

SPI-NOR flash — Common for compact, reliable boot and system firmware storage.
SPI-NAND flash — Higher-density alternative to NOR for cost-effective larger firmware or data partitions.
eMMC — Embedded MultiMediaCard interface for higher-capacity, higher-performance storage when needed.
SD — SD card interface (also listed among general I/O), enabling optional removable storage or alternative boot media in some designs.

These interfaces appear consistently in official specifications under both “Flash” and storage I/F categories. Manufacturers select among them based on capacity needs, cost targets, reliability requirements, and form-factor constraints.

Design Flexibility and Practical Use

The combination of DDR3/DDR4 DRAM support plus the SPI-NOR/SPI-NAND/eMMC/SD storage options gives OEMs significant latitude:

Entry-level or cost-optimized routers can use smaller DDR3 configurations with SPI-NOR or SPI-NAND for firmware.
Higher-feature gateways or enterprise access points can adopt faster DDR4 memory and eMMC for richer software stacks, local storage of logs, or light application services.
The SD interface and USB expansion (covered in other interfaces) further extend storage possibilities for media sharing or external drives.

Because the NPU and hardware accelerators offload much of the packet-processing work, the memory subsystem does not need to be oversized for pure forwarding performance. This keeps system cost and power in line with the platform’s mainstream positioning.

Summary

The Filogic 860 supports DDR3 and DDR4 system memory along with SPI-NOR, SPI-NAND, eMMC, and SD non-volatile storage interfaces. These options provide the flexibility required for a wide range of Wi-Fi 7 networking products while remaining practical and cost-effective. Exact DRAM capacity, speed grades, and flash sizes are defined at the product design stage rather than fixed by the SoC itself.

Security capabilities

As a mainstream Wi-Fi 7 networking SoC intended for routers, access points, gateways, and related devices, the Filogic 860 incorporates hardware acceleration for cryptographic networking operations along with basic secure storage elements. Public documentation focuses primarily on performance-oriented crypto offload rather than exhaustive platform-security details.

Hardware Networking Crypto Engine

The most prominently documented security-related feature is the hardware-based Networking Crypto engine (EIP-197).

It accelerates:

IPv4 Network Address and Port Translation (NAPT / NATP)
IPv6 processing
Dual-Stack Lite (DS-Lite)
6RD (IPv6 Rapid Deployment)

This offload reduces CPU load when handling encrypted or translated traffic, which is common in modern gateways, VPNs, and service-provider deployments. The engine works in conjunction with the Network Processing Unit (NPU) to maintain high throughput even under security-related workloads.

Secure Storage Elements

The platform includes OTP (One-Time Programmable) memory among its I/O and peripheral features.

OTP is typically used in networking SoCs for:

Storing unique device identifiers or keys
Holding configuration data that should not be altered after manufacturing
Supporting secure boot or key derivation processes

Exact usage depends on the device manufacturer’s implementation and firmware.

Broader Platform and Family Context

Public high-level specifications for the Filogic 860 do not list an extensive set of advanced security features such as detailed Secure Boot descriptions, Arm TrustZone support, true random number generators (TRNG), or hardware unique keys (HUK) in the same detail provided for the higher-end Filogic 880 / MT7988A.

The related MT7988A (Filogic 880) documentation includes Secure Boot-ROM, power-glitch detection, TRNG compliant with NIST SP 800-90C, anti-rollback protection, secure key storage with a unique per-chip Hardware Unique Key (HUK), firmware encryption support, and AES cryptography functions. Because the Filogic 860 (MT7988D) belongs to the same silicon family, many of these capabilities are expected to be present or partially available, but they are not explicitly highlighted in the mainstream product materials for the 860.

Wi-Fi security follows standard Wi-Fi 7 requirements. Related chips in the Filogic lineup support WPA3, and the 860 is expected to do the same as part of full 802.11be compliance.

Practical Implications

The EIP-197 crypto engine provides tangible performance benefits for common gateway security functions (NAT, tunneling, and dual-stack operations).
OTP support gives manufacturers a foundation for device identity and basic secure configuration.
Full end-product security (secure boot chain, encrypted storage, firewall strength, VPN performance, etc.) depends heavily on the firmware and software stack implemented by the device maker (for example, OpenWrt-based or proprietary images).

In summary, the Filogic 860’s publicly documented security capabilities center on the EIP-197 hardware networking crypto engine for accelerated IPv4/IPv6 and tunneling operations, plus OTP for secure or permanent data storage. More advanced platform-security features common in the broader MT7988 family may be available but are not detailed in the official mainstream product descriptions for this specific chipset.

Single-MAC MLO (Multi-Link Operation)

Single-MAC MLO is MediaTek’s preferred hardware implementation of Wi-Fi 7’s Multi-Link Operation. It enables a device (access point or client) to use multiple frequency bands or channels simultaneously or in rapid succession under coordinated control, delivering higher aggregate throughput, lower latency, improved reliability, and more efficient spectrum use.

What Is Multi-Link Operation (MLO)?

MLO is one of the defining innovations of IEEE 802.11be (Wi-Fi 7). Unlike earlier Wi-Fi generations, where a device typically operated on one band at a time and incurred significant overhead when switching, MLO allows a Multi-Link Device (MLD) to establish and maintain multiple links (for example, across 2.4 GHz, 5 GHz, and/or 6 GHz).

Key benefits of MLO in general include:

Bandwidth aggregation across links for higher effective data rates.
Lower latency through intelligent traffic distribution and rapid link switching.
Greater reliability and interference resilience (if one link is congested or degraded, traffic can shift to another).
Support for advanced modes such as Simultaneous Transmit and Receive (STR) and Enhanced Multi-Link Single Radio (eMLSR).

Single-MAC vs. Multi-MAC Architectures

MLO can be implemented in different ways at the MAC layer. MediaTek distinguishes between:

Single-MAC MLO (preferred by MediaTek): A single upper MAC (UMAC) coordinates multiple lower MACs (LMACs) and physical layers (PHYs) that reside on the same chip. All multi-link aggregation, scheduling, and band-switching decisions occur within one silicon die. There is no need for high-latency inter-chip communication (such as over PCIe) between separate band-specific MACs.
Multi-MAC (or multiple-MAC) MLO: Separate MAC entities—often on different chips or partitions—handle each band. Coordination and data movement between them typically require an inter-chip bus or host processor involvement, which adds latency, power cost, and complexity.

MediaTek’s white papers and product materials emphasize that the single-MAC approach (sometimes called “single-chip MAC MLO”) provides the lowest internal synchronization cost, fastest link switching, and best overall efficiency.

MediaTek’s Claims and Measured Advantages

On the Filogic 860 (and sibling platforms such as the Filogic 880), MediaTek highlights these advantages of its Single-MAC MLO design:

Dramatically lower latency — Claims of up to 100× lower latency versus competing Wi-Fi 7 solutions that use multi-MAC approaches. Multi-link aggregation performed entirely on one chip enables the fastest and smoothest band switching.
Higher throughput — Independent tests cited by MediaTek show approximately 50% higher throughput in certain flagship BE19000 tri-band comparisons, and around 27% higher UDP throughput in other single-MAC versus conventional multi-MAC tri-band access-point tests.
Better power efficiency — Reduced inter-chip traffic and tighter hardware coordination lower power consumption during multi-link operation.
Smoother performance under load — Adaptive techniques such as smart/link dispatch further optimize how traffic is balanced across available links, improving results in both clean and congested channel conditions.

These benefits are especially relevant for latency-sensitive applications (cloud gaming, video calls, AR/VR, real-time collaboration) and for maintaining high performance in dense or interference-prone environments.

Relevance to the Filogic 860

The Filogic 860 implements Single-MAC MLO as a core feature of its dual-band (2.4 GHz + 5/6 GHz) Wi-Fi 7 design. Combined with 4096-QAM, Multi-RU (MRU), and the platform’s 5×5 antenna configuration on the higher band, it enables the claimed industry-leading dual-band MLO speeds of up to 7.2 Gbps (BE7200 PHY rate). Because aggregation and control stay on a single chip, the architecture aligns well with the 860’s mainstream positioning—delivering strong multi-link benefits without the higher complexity or cost of full tri-band flagship solutions.

In short, Single-MAC MLO is MediaTek’s hardware-centric approach to realizing Wi-Fi 7’s multi-link potential. By keeping the upper MAC and coordination logic on one die, the Filogic 860 (and related platforms) aim to deliver lower latency, higher effective throughput, and more efficient band switching than multi-MAC designs that rely on inter-chip communication.

Xtra Range technology and antenna design

These elements form a distinctive part of the platform’s dual-band Wi-Fi 7 architecture, aimed at improving coverage, throughput, and reliability—particularly on the higher-frequency 5 GHz and 6 GHz bands that normally suffer from greater path loss and weaker penetration compared with 2.4 GHz.

Antenna Configuration

The Filogic 860 uses a dual-band antenna design:

2.4 GHz: 4×4 (4T4R) configuration, supporting up to 40 MHz channel bandwidth.
5/6 GHz: Novel 5×5 (or 5T5R) array that supports 4 spatial streams (4SS) and up to 160 MHz channel bandwidth. This includes a dedicated receive (Rx) antenna path.

Official materials describe it as a “unique 4×5 antenna design” or “novel 5×5 5/6GHz antenna including a dedicated Rx for 0-DFS detection.” The extra receive path enables both MediaTek’s Xtra Range technology and zero-wait Dynamic Frequency Selection (DFS).

MediaTek Xtra Range Technology

Xtra Range is MediaTek’s proprietary approach that leverages the additional receive antenna on the 5/6 GHz radio to enhance uplink reception from client devices.

Key mechanisms and claimed benefits:

Improved Receive Diversity and Maximum Ratio Combining (MRC) — The 5T5R (or 4T5R) configuration captures multiple versions of the same client signal arriving via different paths. Digital processing combines these signals to reconstruct a stronger, more stable connection.
Performance gains — MediaTek states that the design boosts 5/6 GHz range and throughput in typical indoor scenarios by approximately +3 dB with the 4T5R configuration. An additional +4 dB improvement is claimed from enhanced digital pre-distortion (iDPD) RF techniques.
Practical impact — These gains help overcome the inherent propagation limitations of 5 GHz and especially 6 GHz signals. The result is better coverage, higher sustained throughput at distance, and more reliable mesh backhaul links.

Because client devices (especially smartphones and IoT gadgets) often have limited transmit power, improving the access point’s ability to “listen” more effectively is particularly valuable for uplink performance and overall link balance.

Zero-Wait DFS Support

The dedicated receive antenna also enables zero-wait DFS. Dynamic Frequency Selection requires continuous monitoring of radar activity on certain 5 GHz (and potentially 6 GHz) channels. With a dedicated Rx path, the platform can monitor for radar without interrupting ongoing data transmission on the primary antennas. This avoids the service interruptions that can occur with traditional DFS implementations that share the main radio chains for monitoring.

Design Intent and Use Cases

The combination of the 5×5 / 4T5R higher-band design, Xtra Range processing, and zero-wait DFS is intended to:

Extend usable range and improve indoor throughput on 5/6 GHz.
Strengthen mesh networking backhaul reliability.
Maintain continuous high-speed operation even when DFS channels are in use.
Deliver a competitive advantage in mainstream dual-band Wi-Fi 7 routers, access points, and gateways without requiring a full tri-band flagship configuration.

In summary, the Filogic 860 pairs a conventional 4×4 2.4 GHz radio with a distinctive 5×5 (5T5R) 5/6 GHz radio that includes an extra dedicated receive path. MediaTek’s Xtra Range technology uses this extra antenna for improved receive diversity and MRC, claiming roughly +3 dB (plus further RF gains) in indoor 5/6 GHz performance, while the same path also enables zero-wait DFS. Together these features aim